Add solutions for part 1

This commit is contained in:
2020-11-15 13:57:48 -05:00
parent e4f9fd2682
commit 742db6d102
479 changed files with 202980 additions and 13 deletions

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projects/demo/Xor.cmp Normal file
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| a | b | out |
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |

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projects/demo/Xor.hdl Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/demo/Xor.hdl
/**
* Exclusive-or gate: true if either a is true and b is false, or
* a is false and b is true; false otherwise.
* QUESTION: how can the simulator execute this program properly without
* HDL implementations of the underlying Not, And, and Or chip-parts?
* Answer: since the demo folder contains no Not.hdl, And.hdl and Or.hdl
* files, the simulator reverts to using their built-in implementations.
*/
CHIP Xor {
IN a, b;
OUT out;
PARTS:
Not (in=a, out=nota);
Not (in=b, out=notb);
And (a=a, b=notb, out=x);
And (a=nota, b=b, out=y);
Or (a=x, b=y, out=out);
}

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projects/demo/Xor.out Normal file
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projects/demo/Xor.tst Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/Xor.tst
load Xor.hdl,
output-file Xor.out,
compare-to Xor.cmp,
output-list a%B3.1.3 b%B3.1.3 out%B3.1.3;
set a 0,
set b 0,
eval,
output;
set a 0,
set b 1,
eval,
output;
set a 1,
set b 0,
eval,
output;
set a 1,
set b 1,
eval,
output;