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Add solutions for part 1

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Felix Martin
2020-11-15 13:57:48 -05:00
parent e4f9fd2682
commit 742db6d102
479 changed files with 202980 additions and 13 deletions
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projects/03/a/RAM64.hdl Normal file
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CHIP RAM64 {
IN in[16], load, address[6];
OUT out[16];
PARTS:
DMux8Way(in=load, sel=address[3..5], a=s0, b=s1, c=s2, d=s3, e=s4, f=s5, g=s6, h=s7);
RAM8(in=in, load=s0, address=address[0..2], out=r0s);
RAM8(in=in, load=s1, address=address[0..2], out=r1s);
RAM8(in=in, load=s2, address=address[0..2], out=r2s);
RAM8(in=in, load=s3, address=address[0..2], out=r3s);
RAM8(in=in, load=s4, address=address[0..2], out=r4s);
RAM8(in=in, load=s5, address=address[0..2], out=r5s);
RAM8(in=in, load=s6, address=address[0..2], out=r6s);
RAM8(in=in, load=s7, address=address[0..2], out=r7s);
Mux8Way16(a=r0s, b=r1s, c=r2s, d=r3s, e=r4s, f=r5s, g=r6s, h=r7s, sel=address[3..5], out=out);
}